What is PEPITA ?

PEPITA is a 32 channels ASIC developed at the DEDIP to work with the PEPITES experiment. During the phase test PEPITA works with the MATIS board.

MATIS

• Principle
  • FMC connector
  • I2C link
• Slow control
  • Writing
  • Reading
• Power on
• Injection
  • Detector like
  • Fast
• Reference to DAC
• Trigger to FPGA
• Custom IO

PEPITA

• Architecture
  • Registers
    • BIN_VCM
    • BIN_VTH_H
    • BIN_VTH_L
    • MODE_ABC
    • MODE_PEPITA
    • SHORT_SAMPLER
    • ANA_ON
    • MULTIPLICITY
    • SW_PEPITA
  • Signals
    • Input signals
    • Output signals
• Slow control
  • Serial link
  • Writing
  • Reading
• Readout
  • Time to Digital Converter (TDC)
  • Analog Multiplexed (AMUX)
  • ASIC 8 channels (8CH)
• Calibration
• Zero
• Firmware

How to

• Setup
  • Windows 10 users
  • Mac users
  • Linux users
• Network configuration
  • Using Pyrame with bindPyrame
  • Direct connection (No Pyrame)
• Developping
  • Exemples
• The PEPITA test software
  • The GUI
• The Pyrame pocket guide
  • General
  • LLR Test bench
  • How to create a script
• Contributing to the docs
• To Do List

Indices and tables

• Index

• Module Index

• Search Page