PEPITA
MATIS
Principle
FMC connector
I2C link
Slow control
Writing
Reading
Power on
Injection
Detector like
Fast
Reference to DAC
Trigger to FPGA
Custom IO
PEPITA
Architecture
Registers
BIN_VCM
BIN_VTH_H
BIN_VTH_L
MODE_ABC
MODE_PEPITA
SHORT_SAMPLER
ANA_ON
MULTIPLICITY
SW_PEPITA
Signals
Input signals
Output signals
Slow control
Serial link
Writing
Reading
Readout
Time to Digital Converter (TDC)
Analog Multiplexed (AMUX)
ASIC 8 channels (8CH)
Calibration
Zero
Firmware
How to
Setup
Windows 10 users
Windows <= 1803
Windows 1909
Developping from Windows with the virtual machine
In Windows
In the virtual machine
Mac users
Linux users
Network configuration
Using Pyrame with bindPyrame
Direct connection (No Pyrame)
Developping
Exemples
The PEPITA test software
The GUI
Changing GUI colors
MATIS panel
Registers panel
Channel panel
Override power
DAC Voltage
Override Voltage
DAQ panel
Bench
The Pyrame pocket guide
General
LLR Test bench
How to create a script
Contributing to the docs
To Do List
PEPITA
Docs
»
Index
Index